CIP on Intel® Agilex™ FPGA

Problem

The popularity of smartphone and social network makes taking and sharing of pictures extremely simple and convenient. In China alone there are 620 million mobile phone users, 74% of which use their devices to take pictures. These pictures inevitably end up as image data stored in Internet Data Centers (IDC).As a result, image processing computation such as image transcoding, thumbnail generation, image recognition and the like on these massive image data have become part of IDC computation workload.

Solution

CTAccel Image Processing (CIP) accelerator is an FPGA-based image processing acceleration solution that greatly improves the performance of image processing and image analytics by transferring computational workload from CPU to FPGA. CIP's powerful processing capabilities improves data centers throughput and latency while reduces total cost of ownership.

Intel Agilex 7 FPGAs and SoCs F-Series are FPGAs built on Intel 10 nm SuperFin process technology. They are optimized for applications requiring high performance, lower power, and smaller sizes. They offer features such as transceiver rates up to 58 Gbps, advanced DSP blocks supporting multiple precisions of fixed-point and floating-point operations, and high-performance crypto blocks.